A non-volatile memory is a kind of semiconductor memory devices. Such a non-volatile memory includes a mask ROM and a field-programmable-memory. A mask ROM is a memory in which data are written once in a manufacturing process and cannot be deleted semi-permanently. On the other hand, field-programmable memory is categorized by one of a volatile memory, in which one time wiring is possible, and a non-volatile memory, in which operations of reading, deleting and re-writing are possible. A memory with a function of single writing operation is called a PROM (Programmable ROM) or OTPROM (One Time Programmable ROM). Also there are other types of semiconductor memory devices, UVEPROM (Ultraviolet Erasable Programmable ROM), EEPROM (Electrically Erasable Programmable ROM) and flash EEPROM (high-speed flexible EEPROM).
A mask ROM has an advantage of manufacturing cost. However, a mask ROM has disadvantages in that it takes a long time to deliver to a user since the user orders it because program data are written in a fabrication process and it takes a longer period of time to treat program bugs. On the other hand, a field-programmable memory has an advantage in that it takes shorter period of time to treat program bugs, and therefore, it takes shorter period of time to deliver to a user since the user orders it. For that reason, these days, field programmable memory devices have been widely used.
FIG. 7 shows a conventional non-volatile memory of OTPROM as one kind of field programmable memories. A transistor 41 is formed on a silicon substrate 40. A third wiring 433 is formed on a third insulating layer 453. The third wiring 433 is connected to a conductive member 434, which is used for electrical input/output to each transistor. The third wiring 433 connects the transistors 41 to form a peripheral circuit. A non-volatile memory cell 42 is formed above a second insulating layer 452 so as to be insulated electrically from the transistor 41. The memory cell 42 includes a fuse insulation layer 47 and a conductive layer 46. Each memory cell is connected to a first wiring layer 431, connected to a reading line used for information reading operation, and to a second wiring layer 432, connected to a ground line. When electrical stress is applied to the fuse insulation layer 47 using the first and second wiring layers 431 and 432, the fuse insulation layer 47 would be broken. A permanent change of state would be occurred, so that a data-writing operation can be performed only once. Since the resistive value of the fuse insulation layer 47 varies depending on whether the fuse insulation layer 47 is broken or not, read date of “0” or “1” is determined based on the difference of the resistive value. Each memory cell of the OTPROM stores one bit date indicating two state information therein. [Patent Publication 1] P2002-530850A
It has always been demanded that semiconductor memory devices are fabricated at lower cost and are provided with a higher density of integration regardless types of the memory devices. For OTPROM of non-volatile memory, wirings have got narrower and multiple-integrated to improve density of integration and to reduce fabrication costs. On the other hand, it takes a long time to entry such a high-integration memory device in the market. That is because it is required to change design rules and to reform or rebuild manufacturing equipments and plants in order to entry such a high-integration memory device in the market. Further, a reforming or rebuilding of manufacturing equipments and plants would cost much. For that reason, risks should be considered according to market trend for market entry. In order to obtain advantages against competitors, degree of integration of memory devices should be improved without renewal of manufacturing equipments and facilities.